{"id":183,"date":"2024-01-05T10:17:53","date_gmt":"2024-01-05T10:17:53","guid":{"rendered":"https:\/\/teksemidesign.com\/?page_id=183"},"modified":"2024-02-14T12:41:11","modified_gmt":"2024-02-14T12:41:11","slug":"asic-verification","status":"publish","type":"page","link":"https:\/\/teksemidesign.com\/?page_id=183","title":{"rendered":"ASIC Verification"},"content":{"rendered":"\t\t<div data-elementor-type=\"wp-page\" data-elementor-id=\"183\" class=\"elementor elementor-183\" data-elementor-post-type=\"page\">\n\t\t\t\t\t\t\t\t\t<header class=\"elementor-section elementor-top-section elementor-element elementor-element-01426bc elementor-section-height-min-height elementor-section-items-stretch elementor-section-content-middle elementor-section-boxed elementor-section-height-default\" data-id=\"01426bc\" data-element_type=\"section\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;}\">\n\t\t\t\t\t\t\t<div class=\"elementor-background-overlay\"><\/div>\n\t\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-top-column elementor-element elementor-element-ee1131a\" data-id=\"ee1131a\" data-element_type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t\t\t<div class=\"elementor-element elementor-element-5d48816 elementor-widget elementor-widget-image\" data-id=\"5d48816\" data-element_type=\"widget\" data-widget_type=\"image.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t<style>\/*! elementor - v3.18.0 - 20-12-2023 *\/\n.elementor-widget-image{text-align:center}.elementor-widget-image a{display:inline-block}.elementor-widget-image a img[src$=\".svg\"]{width:48px}.elementor-widget-image img{vertical-align:middle;display:inline-block}<\/style>\t\t\t\t\t\t\t\t\t\t\t\t<img decoding=\"async\" width=\"53\" height=\"55\" src=\"https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/detail4.png\" class=\"attachment-large size-large wp-image-20\" alt=\"\" \/>\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-ae6f143 elementor-widget__width-auto elementor-widget elementor-widget-heading\" data-id=\"ae6f143\" data-element_type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t<style>\/*! elementor - v3.18.0 - 20-12-2023 *\/\n.elementor-heading-title{padding:0;margin:0;line-height:1}.elementor-widget-heading .elementor-heading-title[class*=elementor-size-]>a{color:inherit;font-size:inherit;line-height:inherit}.elementor-widget-heading .elementor-heading-title.elementor-size-small{font-size:15px}.elementor-widget-heading .elementor-heading-title.elementor-size-medium{font-size:19px}.elementor-widget-heading .elementor-heading-title.elementor-size-large{font-size:29px}.elementor-widget-heading .elementor-heading-title.elementor-size-xl{font-size:39px}.elementor-widget-heading .elementor-heading-title.elementor-size-xxl{font-size:59px}<\/style><h1 class=\"elementor-heading-title elementor-size-default\">ASIC Verification\n<\/h1>\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t\t\t<\/div>\n\t\t<\/header>\n\t\t<div class=\"elementor-element elementor-element-36d693d e-flex e-con-boxed e-con e-parent\" data-id=\"36d693d\" data-element_type=\"container\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;,&quot;content_width&quot;:&quot;boxed&quot;}\" data-core-v316-plus=\"true\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div class=\"elementor-element elementor-element-835f101 e-con-full e-flex e-con e-child\" data-id=\"835f101\" data-element_type=\"container\" data-settings=\"{&quot;content_width&quot;:&quot;full&quot;}\">\n\t\t\t\t<div class=\"elementor-element elementor-element-6b249fb elementor-widget elementor-widget-image\" data-id=\"6b249fb\" data-element_type=\"widget\" data-widget_type=\"image.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<img fetchpriority=\"high\" decoding=\"async\" width=\"580\" height=\"373\" src=\"https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/3.jpg\" class=\"attachment-large size-large wp-image-88\" alt=\"\" srcset=\"https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/3.jpg 613w, https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/3-300x193.jpg 300w\" sizes=\"(max-width: 580px) 100vw, 580px\" \/>\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-400d975 e-con-full e-flex e-con e-child\" data-id=\"400d975\" data-element_type=\"container\" data-settings=\"{&quot;content_width&quot;:&quot;full&quot;}\">\n\t\t\t\t<div class=\"elementor-element elementor-element-ed55df8 elementor-widget elementor-widget-text-editor\" data-id=\"ed55df8\" data-element_type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t<style>\/*! elementor - v3.18.0 - 20-12-2023 *\/\n.elementor-widget-text-editor.elementor-drop-cap-view-stacked .elementor-drop-cap{background-color:#69727d;color:#fff}.elementor-widget-text-editor.elementor-drop-cap-view-framed .elementor-drop-cap{color:#69727d;border:3px solid;background-color:transparent}.elementor-widget-text-editor:not(.elementor-drop-cap-view-default) .elementor-drop-cap{margin-top:8px}.elementor-widget-text-editor:not(.elementor-drop-cap-view-default) .elementor-drop-cap-letter{width:1em;height:1em}.elementor-widget-text-editor .elementor-drop-cap{float:left;text-align:center;line-height:1;font-size:50px}.elementor-widget-text-editor .elementor-drop-cap-letter{display:inline-block}<\/style>\t\t\t\t<p>Due to their extreme complexity and millions of transistors, modern ASIC chips are quite likely to have errors introduced at some point during the design process. The cost of the error will decrease with early detection. It is crucial to make sure the ASIC is bug-free as soon as feasible, ideally during the design phase.<\/p><p>Verifying that the design satisfies system requirements and specifications is the aim of ASIC verification.<\/p><p>Teksemi Design has one of the best design verification teams in the business. With the most recent techniques, such SV-UVM and UPF, our team can do verification of complicated SoCs and IPs from scratch while fulfilling important KPIs, like 100% functional and code coverage for Advanced IP &amp; SoC Verification.<\/p>\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<section class=\"elementor-section elementor-top-section elementor-element elementor-element-3f1fca5 elementor-section-stretched elementor-reverse-tablet elementor-reverse-mobile elementor-section-boxed elementor-section-height-default elementor-section-height-default\" data-id=\"3f1fca5\" data-element_type=\"section\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;,&quot;stretch_section&quot;:&quot;section-stretched&quot;}\">\n\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-top-column elementor-element elementor-element-2a132ac\" data-id=\"2a132ac\" data-element_type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t\t\t<div class=\"elementor-element elementor-element-ac4b8d7 elementor-widget elementor-widget-heading\" data-id=\"ac4b8d7\" data-element_type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t<h2 class=\"elementor-heading-title elementor-size-default\">Capabilities\n<\/h2>\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-4e5e479 elementor-widget elementor-widget-text-editor\" data-id=\"4e5e479\" data-element_type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t<ul><li>Environment Architecture Development<\/li><li>Verification<\/li><li>SoC Verification<\/li><li>IP\/SS Verification<\/li><li>DFT\/DFD Validation<\/li><li>Power-aware Verification<\/li><li>AMS<\/li><li>CPU Verification<\/li><li>Gate Level Simulations (GLS)<\/li><li>VIP Development, 3rd party VIP Integration, Development and Modelling<\/li><li>Assertions, Coverage and Formal Verification<\/li><\/ul>\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t<div class=\"elementor-element elementor-element-edf42a9 e-flex e-con-boxed e-con e-parent\" data-id=\"edf42a9\" data-element_type=\"container\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;,&quot;content_width&quot;:&quot;boxed&quot;}\" data-core-v316-plus=\"true\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div class=\"elementor-element elementor-element-da1a396 e-con-full e-flex e-con e-child\" data-id=\"da1a396\" data-element_type=\"container\" data-settings=\"{&quot;content_width&quot;:&quot;full&quot;}\">\n\t\t\t\t<div class=\"elementor-element elementor-element-dee64bd elementor-widget elementor-widget-heading\" data-id=\"dee64bd\" data-element_type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t<h2 class=\"elementor-heading-title elementor-size-default\">Expertise\n<\/h2>\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-8bbb611 elementor-widget elementor-widget-text-editor\" data-id=\"8bbb611\" data-element_type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t<ul><li>IPs: USB\/ SATA\/ DDR\/ LPPP\/ AHB\/AXI\/ SD\/ MMC\/ HDMI<\/li><li>Technologies:X86 Processor, ARM\/DSP Based SoC, 4G\/LTE, Switching, BTLE\/NFC<\/li><li>Languages: VHDL, Verilog and System Verilog, C\/ C++<\/li><li>Methodologies: OVM\/ UVM\/ VVM<\/li><li>SoCs: Mobile Processor, Graphics Processor, Network Processor, Automotive, LTE Modem chip<\/li><li>Misc: IFV, PSL, Lower power verification in UPF<\/li><li>Verification:<ul><li><strong>Full chip verification<\/strong>: Proficiency in building SoC verification environment from scratch as well as legacy environment.<\/li><li><strong>Module \/ IP Verification:<\/strong>\u00a0Module-level verification experience in a wide variety of domains \u2013 Networking, Image \/ Video processing, x86 Processors, Bus protocols<\/li><li><strong>Gate Level Simulation:<\/strong>\u00a0Full chip gate level simulations<\/li><li><strong>Low Power Verification:<\/strong>\u00a0Expertise in low power verification methodology with CPF, UPF<\/li><li><strong>Assertion Based Verification:<\/strong>\u00a0Assertion based verification for successful and faster closure of designs using SVA &amp; PSL<\/li><li><strong>Analog &amp; Mixed Signal Verification:\u00a0<\/strong>The AMS verification team at Excelmax has the skillsets required to execute.<\/li><\/ul><\/li><\/ul>\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-791f2e5 e-con-full e-flex e-con e-child\" data-id=\"791f2e5\" data-element_type=\"container\" data-settings=\"{&quot;content_width&quot;:&quot;full&quot;}\">\n\t\t\t\t<div class=\"elementor-element elementor-element-a2442ea elementor-widget elementor-widget-image\" data-id=\"a2442ea\" data-element_type=\"widget\" data-widget_type=\"image.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<img decoding=\"async\" width=\"580\" height=\"342\" src=\"https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/istockphoto-1344939844-612x612-1.jpg\" class=\"attachment-large size-large wp-image-304\" alt=\"\" srcset=\"https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/istockphoto-1344939844-612x612-1.jpg 612w, https:\/\/teksemidesign.com\/wp-content\/uploads\/2024\/01\/istockphoto-1344939844-612x612-1-300x177.jpg 300w\" sizes=\"(max-width: 580px) 100vw, 580px\" \/>\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"<p>ASIC Verification Due to their extreme complexity and millions of transistors, modern ASIC chips are quite likely to have errors introduced at some point during the design process. The cost of the error will decrease with early detection. It is crucial to make sure the ASIC is bug-free as soon as feasible, ideally during the [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_header_footer","meta":{"footnotes":""},"class_list":["post-183","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/pages\/183","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/teksemidesign.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=183"}],"version-history":[{"count":7,"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/pages\/183\/revisions"}],"predecessor-version":[{"id":452,"href":"https:\/\/teksemidesign.com\/index.php?rest_route=\/wp\/v2\/pages\/183\/revisions\/452"}],"wp:attachment":[{"href":"https:\/\/teksemidesign.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=183"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}